11/14/2025 12 AM - Research on FPGA

Motivation

I may be a little bit too ambitious with this project given that there are only two weeks to work on this thing. I too am a complete beginner, but after having made two projects, this perhaps could be a testament to what I've learnt about PCBs so far.

Research

I chose to build my FPGA using the Lattice ICE40UP5K. I read its datasheet. Since I am a very complete beginner, I needed to study FPGA architecture which I found using this design guide from intel.

What I learnt

The greatest way to learn is to teach it to someone. Over the next few journals, I am going to be describing some concepts I learnt from the document.

FPGA (Field Programmable Gate Arrays) are made up of grid configurable logics such as Adaptive Logic Modules (ALM), Digital Signal Processing (DSP) and RAM.

ALM - consists of LUTs (Look-up table is a small memory block that stores the results of calculations in advance) which can be used to implement custom logic circuits
DSP - high speed simple addition and multiplication operations

There was this link too talking about the ways of configuring an FPGA. A great simple guide that gives significance to the usage of an MCU

11/14/2025 6 PM - More Research of the FPGA

Research

I randomly came across a youtube video of a custom FPGA without the need for an MCU. The video argued that the FPGA is already connected to the Flash so there is no need for an external hardware to talk to the computer and use the Flash/ROM etc.

That got me thinking. Do I really need an external MCU? I dove into this rabbit hole and found FOMU -a custom PCBA with absolutely no MCU.

However, looking at forums, some did mention that:

• There was a higher LUT usage despite the FPGA being tiny
• More timing-sensitive code

And some disadvantages of having no MCU (taken from Google):

• More difficult debugging (no debug logs or independent UART/SWD interface; if the FPGA crashes, you have no way to inspect what went wrong)
• Risk of soft-bricking the board if the USB bootloader or bitstream fails, since there’s no separate MCU to recover the FPGA
• Constrained I/O and peripheral support, as all interfaces must be bit-banged or implemented in logic, reducing resources for user logic
• Higher susceptibility to timing issues and unstable USB behavior, due to all protocol handling being implemented in the FPGA itself.

Among other issues. So I guess it was settled that I will have an MCU acting as the Master and the FPGA as the slave

FPGA Major Components

Below is a draft of major components I am going to use for my FPGA:

• Lattice ICE40UP5K
• RP2350
• SPI Flash
• qSPI SRAM
• LDOs
• Crystal/Oscillator
• USB-UART
• Breakout Headers
• PMOD
• VGA connector
• Buzzer
• Power Switch
• Push Buttons
• 3 RGB LEDs