11/23/2025 4 PM - Whole Project Complete

Really Sorry! I can't keep up with this journal. My main journal has been posted in gitub.

Initial Concept Research (1.5 hours)

I began exploring the initial idea by studying various YouTubers and technical websites to understand different design approaches. I noticed that using separate controllers required excessive wiring and physical space. My first plan was to combine open-source Ethernet-to-USB and UART-to-USB schematics and merge them using a USB hub IC.

Ethernet to USB 2.0
Schematic
UART to USB-C Repo

Studying Open-Source Schematics (2 hours)

I followed open-source hardware designs, but discovered that many components were unavailable, back-stocked, or incompatible. For the Ethernet port, the magnetic-shielded connector required four differential TX/RX pairs, and I found mismatches between open-source examples and my needs. Still, the reference schematics helped a lot.

First Schematic Attempt & Failure Realization (1.5 hours)

After around five hours of work integrating open-source parts into my schematic, I realized the design would fail. The referenced example used USB-C-to-UART only, creating back-feed issues. The PHY controller I picked was too powerful and poorly matched because everything had to operate over USB 2.0 to match my mobile phone’s OTG limitations.

Learning Datasheets for the First Time (2 hours)

I began reading datasheets seriously for the first time in my life. I learned that datasheets include example circuits that were more helpful than any online answer or AI suggestion. ChatGPT was not reliable for exact electrical values. Going through LCSC, I finally discovered the correct controller IC that matched my USB 2.0 requirements.

Day 2

Restarting the Entire Schematic (5.5 hour)

I restarted my schematic from scratch. The earlier open-source designs still helped because some connections matched. Missing passive component values were found from Google searches, not ChatGPT. The UART-to-USB section was easy because the chip had a simple example diagram. The Ethernet controller was extremely difficult. It had so many complex connections that I nearly had to pull an all-nighter to finish it. I had to stay focused because if I left it halfway, I would forget the connection logic. I had to select a hub IC capable of upstreaming data reliably. FE1.1 was an option but had too many ports. I ultimately chose SL1.1 because its specs matched my project’s data flow requirements. I designed the AC input section that steps down to 5V. The example power circuits in the datasheet were extremely useful. Component sourcing was difficult because LCSC filtering takes practice. I added the upstream charging IC, letting the mobile phone charge while connected. LED indicators were integrated to show phone charging/battery status. I also built the 3V and 1V converters.

Beginning PCB Layout (4.5)

After completing the schematic, I started PCB layout work. This was the most time-consuming stage. I tested several board outlines and dimensions to fit all components properly. Autoroute failed every time. Proper component placement became critical. I had to switch to full manual routing. I learned about impedance, trace gaps, crosstalk, thermal vias, and multilayer routing through Altium Academy and PCB guru videos. I switched between 4-layer and 6-layer designs until I understood how to use bias and planes properly. After several routing revisions and placement adjustments, I finished the board. I ran DRC checks, ensured power traces were thicker, fixed clearances, and finally completed the PCB.

Initial Layout

Designing Back & Forth

Final Layout

Completed One

Final PCB - Pretty Clean; Proud of Myself

11/23/2025 5 PM - Driver Files Upload

Driver Files Uploaded in Repository for Ethernet & Uart Controller. For Ethernet it is realtek driver & for Uart controller it is silicon lab driver. You can install the driver after connecting to host device.

11/26/2025 - Revision

Differential pair Revision

100R Differential Pair Width - 0.127mm Spacing - 0.253 mm Tolerance - 0.254 mm
90R Differential Pair Width - 0.147mm Spacing - 0.253 mm Tolerance - 0.254 mm

Pick & Place file updated , Gerber Updated, PCB file updated

11/27/2025 - Removed the Via In Pad

Removed the via in pad and updated the repo with new gerber and pcb file. And still the manufacture price is same. JLCPCB Charges the standard 6 layer price.

11/29/2025 - Updated BOM

I have 2013 Excel software. That's Why It made everything unicoded. But luckily online cs editor exists and I fixed my BOM file properly. Hope this is the end!