10/2/2025 - Initial Planning & Schematics

Did a lot of initial planning and research today about the Allwinner V3S. I researched about a lot of SoCs but the V3s was my top choice due it having embedded DRAM and its availability on JLCPCB.

My plan with this project is to make my own SBC in a Raspberry Pi Zero form factor to learn about embedded linux.

In addition to reading the V3s datasheet I also worked on researching ICs for my video output (the V3s does not have a HDMI PHY so I'll need a RGB to HDMI bridge), and an IC for wifi.

I also started working on its schematics today. So far I've only labeled and setup my power rails for the V3s

10/6/2025 - Power and Peripherals

Added a Buck Boost and a LDO to create the 4 voltage rails required for the V3S. 1.2v for core, 1.8v for DRAM, 3.0v and 3.3v for peripherals.

Also added up the low power and rtc crystal for the V3S. It took a while to find out the correct part for the crystals. I also added a SD Card on the SDIO Interface for boot.

10/11/2025 - More Peripherls + Layout

I added ESD protection diodes on the SDIO lines for the SD card.

And I also spent probably like 2 hours trying to find an IC that I could use to integrate wifi on my board and so far I've had no luck.
Realtek had a lot of cheap chips but had shit documentation which was very to understand, the rest of the chips were either not in stock on JLC or just straight up too big to fit on the board. So I decided to skip over wifi for now and I'll maybe come back and consider Realtek later.

I did however add the MIPI CSI header for interfacing cameras, I copied the pinout of the headers from the Raspberry Pis and I used the 15 pin version. Its a 1mm pitch right angle lower contact FPC connector.

I also did a little bit of PCB Layout just to see how everything goes together and so far its looking pretty packed. I'm not even sure if I'd be able to fit everything in this tiny space.

10/15/2025 - Finished Schematics (Almost)

I did a lott of work since the last devlogs.
Here's a list of updates to the schematics

• Added SII9022ACNU which is used to convert the parallel RGB output from the V3s to HDMI
• Added a HDMI port (duh)
• Changed my CSI connector from a 15pin 1mm pitch to a 22pin 0.5mm pitch to save space
• Wired up an Ethernet Receptacle
• Sorted up and organized my schematic, neatly and nicely!

This is what the final schematic looks like!

10/25/2025 - Did some off camera mining

Well uhh as the title says I might have done some off camera mining :D I was slightly busy these past weeks and my work was mostly done in small chunks, but I locked in yesterday and today and spent the entire day working on the PCB and I have my first essential routing completed! (just missing gpio)

This is what my glorious board look like!

front side

back side

And this is what my PCB looks like

Instead of going over everything I'll just give you a rundown of the important stuff.

Firstly I switched over from a 4 layer board to a 6 layer board. I initially went with 4 layers just for the challenge, but very quickly realized upgrading to a 6 layer is basically a no brainer as theres only a ~$20 difference plus I get free capped vias and ENIG. Going 6 layers also gave me an additional plane that I could dedicate just for power and another plane just for signals.
The Stackup I went with was-

• SIG
• GND
• PWR
• SIG
• GND
• SIG

The most time consuming part of my board was definitely the routing out the power plane as I had around 7 different power rails (9 if you include the USB and its inrush limited output). Routing out a plane with 9 different rails was certainly not easy but it was kinda fun and the results in the end were also amazing imo.

Honestly this could have been done with 4 power rails but the SII9022ACNU recommended that I filter out the power rail for it.

On the topic of the RGB to HDMI IC,routing out the parallel RGB signals was very fun and I think the end results look very pretty!

Going back to power, finding a small Inductor for my PMIC was kinda hard. I had to make compromise DCR in order to get a smaller footprint for the inductor so it could actually fit on my board

That's basically everything major I did so far. I'll just add a few more screenshots for fun here!

I'll most likely share my PCB in r/printedcircuitboard for feedback as I'm very confident that there are a few mistakes in my board that I'm not smart enough to catch right now

11/2/2025 - Routed GPIO

Finally routed up the GPIO and my PCB is basically finished now! All I need to do now is to just make a post on reddit and ask for feedback or improvements.

Anyways this is how my PCB looks now!

The V3s unfortunately does not have a lot of GPIO pins so I had to route out and connect my CSI signals to the GPIO and basically share them with the V3s and the GPIO.

11/9/2025 - Fixed the PCB + BOM

Made a reddit post last week, did not get a lot of feedback :sob: but the main feedback was about my CSI differential pairs being too close to each other and not having pairs length matched relative to the clock pair. I fixed both those issues by moving a few vias around and rerouting the CSI data lines.

I also probably spent about an hour just assigning parts (i hated it) but in the end all my components finally have a JLC part assigned to them. Also taking a look at JLC, the PCB currently costs around $150 for 2 PCBA which is honestly good and cheaper than what I expected