Rerouted RAM

It's been around a week since the last update, I was super duper swamped with work. Anyways, I cleaned up some the of the routing, and added two more layers, as I wanted a really clean and concise layer for the differential pairs!

I had to move a couple of traces around, but there weren't much changes.

Added RAM decoupling caps

Yeah so I was out the whole day so heres my progress...
I had to squeeze a lot of the decoupling caps onto the RAM since it has a absurdly crazy amount of power pins. Most of the caps are on the back since they allow for the shortest return path.
A lot, and I mean alot of via in pad was used...
I had the signal traces from the address and byte lines, which made it annoying to fit the caps (less than 0.07mm spacing), so some of the caps are a bit far away...
Alright tomorrow I plan to add the decoupling caps to the processor, and start on the power section schematic.
P.S a total of 40 decoupling caps were used....

I have prayed to the BGA gods and they have answered!!!

Yes.
I finished the RAM routing.
My back hurts.
Okay so since there need to be detail...
I routed the rest of the Address and byte lines, as long as the clock lines. The processor is really iffy since the BGA pins are all over the place, so I had to really use the three layers wisely. My clock traces are 33mm, which is absolutely crazy...
I tried my best to length match the groups (bytes and address) and I achieved a max skew of +-.5mm, which is actually pretty good!
Next, I will probably do the power section, and the decoupling caps for the RAM and RK3566.

Started the routing for LPDDR4 RAM

Hey guys! After finishing the schematic, I started routing the LPDDR4 RAM, and its safe to say that this was a real difficulty. I only routed two byte groups and it was ridiculously cramped...

I finished all of the data lines for the first two byte groups, so onto the address lines and the other byte groups :///

Finished LPDDR4 RAM schematic!

So from my goals last night, I immediately woke up to finish the RAM schematic. It was easier than anticipated, as the processor had dedicated pins for LPDDR4!
I also fixed up the schematic a bit, as it was really messy, and there was unneeded text everywhere...
I'll probably do either the eMMC portion, or the power section next, depending on my mood lol..
I will say that I haven't tried routing out everything, but it seems to be ridiculously annoying...

Started researching and schematic

I started by finding out which processor I wanted to use! This was the main component, so I decided to choose something cost effective, but also powerful! Thats when I had my eyes on the RK3566, which conveniently had a symbol and footprint already on SnapEDA!
I also researched my RAM on LCSC, when I found a beautiful SK Hynix RAM module for a extremely cheap price! 16GB of RAM, LPDDR4 at that, for less than $20!
Using my prior knowledge and skills, I checked the datasheets (I hate you Rockchip for not giving a solid datasheet) and pin mapped to the appropriate areas.
It's around 1 am right now, and I still didn't finish the RAM schematic, so I'm aiming to do the RAM and power schema tommorow!