2/2/2026 8 PM - Partly wired schematic and pre-programmed stm32

I partly connected switch ic on schematic, i am going to connect the rest right now.

I also pre-programmed RMII and SPI interfaces in stm32cubemx, will do prototype code after schematic before pcb ^^

2/2/2026 10 PM - Completed schematic

I completed schematic, it is a bit of rat's nest, but i think it is readable enough
I also used easyeda's page system, i think it is something alongside kicad's sheets, but i can be wrong. Right now, to take break from easyeda, i will do prototype of firmware. Then i will try to route it on pcb, but it is impendance controlled iirc. We will see if jlcpcb integration (their controlled impendance stackup integration) will help.

2/15/2026 - Routed port's traces

I did it! I routed ethernet! I mean, i didnt route RMII between STM32 and KSZ but i did between KSZ and ports. It was hard, and long, journey, but i did it! Now i am doing a few hours break and then i will place decoup caps.

2/16/2026 - Routed oscilators and power regulators and placed decoups

I placed decoups! now i need to connect it. I also placed and connected LDO and 2 Bucks, so everything from power regulators. Now i will connect KSZ with STM32 and then connect decoups.

2/17/2026 12 AM - Connected mcu and ksz!

I connected mrii and spi interfaces between STM32 and KSZ! It was a bit frustrating and i needed to use some vias, but i connected it! now i need to do decoup capacitors, but this can wait until tomorrow.

2/17/2026 3 PM - I think i finished everything except LEDs

I think i finished! I connected everything (including decoups and gnd pins) except LEDs. I will now connect them and then send the files on electronics section of stack exchange, and on blueprint's slack channel for verification if i connected everything right.

2/17/2026 6 PM - Changed Buck

Per comment recommendation, i changed buck converter from TI one to ADI one. They said that TI ones spew EMI interference very much, so i just changed that. Now instead of 2, there is only 1 buck.

2/18/2026 - Improved length matching on ethernet and added inner layers

I changed length matching on ethernet traces to be closer to point that they are going away from their pair. I also added ground and power planes and via stitching to the board.

2/22/2026 - Changed ports, added chassis gnd and improved schematic

Okay, I admit, I forgot to journal change of ports. But I have good excuse! I was (and still partially am) sick with influenza type A. I was barely living, and changed it in one of my good-feel phases that lasted maybe 30 minutes.

I changed ports. I got feedback that on some design you need to have separate center taps for every pair, and they were right that it is like it in my design. Changed them to Bel Fuse 0826-1G1T-23-F as this port is recommended by my switch IC's datasheet. It was easy, just reroute the signals and length match them. I wouldn't say I am very good at this, but it is much easier after a few tries at it. I also got informed that I should do separate GND plane for chassis GND, and connect them in 1–2 spots via high-voltage rated 1nF capacitor. I did that, used 1810 capacitor in 2 places.

Today, I edited switch IC and MCU symbols to divide them into "blocks" as it is called in EasyEda Pro. I made every block a category of its own, where I added all addvh pins to one block, all signal pins to other etc.


I think this is easier to read and analyze. Anyway, now I go game or something and wait for feedback if current state is okay, if yes, I am starting to write firmware for it

2/28/2026 - Refined README.md. Finished firmware. Made 3d case

I did a lot from last journal, but that was because I forgot to add it here, sorry!

Anyway, I refined README.md a lot. It now looks 10000 times better in my opinion. You can see it at this link.

I also made firmware. It was made with big help of AI as I physically can't make firmware for things I don't have physically to test it at the go. I get like amnesia, and suddenly I make stupid errors. It will be fully rewritten when I get physical board. It also should be noted IMO that I did not fully just generate it with AI but used it as very big inspiration. The word very big means that I copied some code blocks directly, but not full code. It was difficult to make it, but I like challenges and I learned some things (e.g., how to write to registers thru SPI, although I still don't understand it fully).

I also made 3D case. This was my latest addition to repo. It was fairly easy as it was few extrudes here and there. It is boxy, and to be honest it is because I forgot to fillet the edges, but I think I will just leave it as I like this design. It looks homemade and I like it.